An On-Chip DNL Estimation Technique and Reconfiguration for Improved Linearity in Current Steering Digital to Analog Converters
نویسندگان
چکیده
This paper proposes a reconfigurable current steering digital to analog converter (DAC). The differential non-linearity error (DNL) of the DAC is estimated on-chip. This is used to reconfigure the switching sequence to get a lower integral nonlinearity error (INL). A 10 bit segmented DAC along with the associated circuits for DNL estimation was designed and fabricated using 0.35μm CMOS technology, through Europractice. The paper includes theoretical analysis, simulation and experimental results for the proposed technique.
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